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Data Fields</h2></td></tr>
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<tr class="memitem:ac5b676d77582f11e8df30598a9f4bd22"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#ac5b676d77582f11e8df30598a9f4bd22">BaseAddr</a></td></tr>
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<tr class="memitem:a9a0799787a21f54ae0eddb8de0b7cf14"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a9a0799787a21f54ae0eddb8de0b7cf14">SAxiClkHz</a></td></tr>
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<tr class="memitem:a3f284f0e071c5a742ac50c143ea66a47"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a3f284f0e071c5a742ac50c143ea66a47">QuadPixelEn</a></td></tr>
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<tr class="memitem:a8bd1f6452601ab45a534e5e567cef1e6"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a8bd1f6452601ab45a534e5e567cef1e6">DualPixelEn</a></td></tr>
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<tr class="memitem:a804bd984a9fe7f1e19d780bf57ed17a7"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a804bd984a9fe7f1e19d780bf57ed17a7">YCrCbEn</a></td></tr>
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<tr class="memitem:a9b41ca69bf5e0ae7300c9a5abd5b34fe"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a9b41ca69bf5e0ae7300c9a5abd5b34fe">YOnlyEn</a></td></tr>
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<tr class="memitem:ad55c96c3cb3b68375ef00270f99624c4"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#ad55c96c3cb3b68375ef00270f99624c4">PayloadDataWidth</a></td></tr>
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<tr class="memitem:a1632df176c6aa05831f6456bc8c0ea6e"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a1632df176c6aa05831f6456bc8c0ea6e">DpProtocol</a></td></tr>
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<tr class="memitem:a69d4f2f8c4557a548f9a0d32fe39ef18"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp___config.html#a69d4f2f8c4557a548f9a0d32fe39ef18">IsRx</a></td></tr>
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<h2 class="groupheader">Field Documentation</h2>
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<p>The base address of the core instance. </p>

<p>Referenced by <a class="el" href="group__dp__v3__0.html#gacfec4779f9319bc515e77088923eb05e">XDp_CfgInitialize()</a>, <a class="el" href="group__dp__v3__0.html#gac946b1c8836833f0c1f0ff321a92bfc7">XDp_RxAudioDis()</a>, <a class="el" href="group__dp__v3__0.html#ga85656ea0eb2f4208877f724413a25c3f">XDp_RxAudioEn()</a>, <a class="el" href="group__dp__v3__0.html#gaec7d0a8c9e4b593ccdcb82e9d1e7f28d">XDp_RxCheckLinkStatus()</a>, <a class="el" href="group__dp__v3__0.html#ga395b87d147ea149bbc51dc6f2d72fedd">XDp_RxDtgDis()</a>, <a class="el" href="group__dp__v3__0.html#ga5e8030bf5d75d0d33d65480200472f10">XDp_RxDtgEn()</a>, <a class="el" href="group__dp__v3__0.html#ga8ee156df7f22a63cf2f0dfd0e7a5a05e">XDp_RxGenerateHpdInterrupt()</a>, <a class="el" href="group__dp__v3__0.html#ga4bd465055f990598d2554b065a295c04">XDp_RxInterruptDisable()</a>, <a class="el" href="group__dp__v3__0.html#ga80768e1423577f78e4b47f99f888a927">XDp_RxInterruptEnable()</a>, <a class="el" href="group__dp__v3__0.html#ga95a5a3a3847224ef0b1b6d92ec9d98c9">XDp_RxMstExposePort()</a>, <a class="el" href="group__dp__v3__0.html#ga424d3b46101c70b80d79047d75227fa8">XDp_RxSetLaneCount()</a>, <a class="el" href="group__dp__v3__0.html#gaf65a177db143ac0cff1f44f155673c22">XDp_RxSetLinkRate()</a>, <a class="el" href="group__dp__v3__0.html#ga5222dbc2986980ba1f5edfa42084eaa4">XDp_RxSetUserPixelWidth()</a>, <a class="el" href="group__dp__v3__0.html#ga5a72b9b2e38f4fb11ac0848da9a80df1">XDp_TxAllocatePayloadVcIdTable()</a>, <a class="el" href="group__dp__v3__0.html#ga5ba215b5d2d3ada4c90aafb36f4ed74a">XDp_TxClearMsaValues()</a>, <a class="el" href="group__dp__v3__0.html#ga2ebce10cc5382091395edb1e106f4ad1">XDp_TxDisableMainLink()</a>, <a class="el" href="group__dp__v3__0.html#ga400f2bfe7aa6c820e915afd0fb685779">XDp_TxEnableMainLink()</a>, <a class="el" href="group__dp__v3__0.html#ga04b03753ee278bdac3e2262b99366493">XDp_TxEstablishLink()</a>, <a class="el" href="group__dp__v3__0.html#ga3305ff3687d4c994d2200ad861828295">XDp_TxIsConnected()</a>, <a class="el" href="group__dp__v3__0.html#ga4d4040715b5a0c02ea8e863aaae13bf5">XDp_TxMstDisable()</a>, <a class="el" href="group__dp__v3__0.html#ga9ea5a1e175846bc39b73cb43e4adc93b">XDp_TxMstEnable()</a>, <a class="el" href="group__dp__v3__0.html#ga89c4158905d36c050a2f77cd70ebef11">XDp_TxResetPhy()</a>, <a class="el" href="group__dp__v3__0.html#ga63402c58ed10a4c59aa0757970351fbe">XDp_TxSetDownspread()</a>, <a class="el" href="group__dp__v3__0.html#ga266286fa19c4e031a7de23fab583ba4f">XDp_TxSetEnhancedFrameMode()</a>, <a class="el" href="group__dp__v3__0.html#ga2eee185e6b432dda6a7ab410b5e78541">XDp_TxSetLaneCount()</a>, <a class="el" href="group__dp__v3__0.html#gae01933583cbbbe16c3582d7440f10a2e">XDp_TxSetLinkRate()</a>, <a class="el" href="group__dp__v3__0.html#ga123f88a702fe841a63f3d0a4bb7aaf09">XDp_TxSetMsaValues()</a>, <a class="el" href="group__dp__v3__0.html#gaaedf47a4635bd225559da3b5cc4c6ac0">XDp_TxSetPhyPolarityAll()</a>, <a class="el" href="group__dp__v3__0.html#gae829b18d0b930de7a7851172b2bd41bb">XDp_TxSetPhyPolarityLane()</a>, and <a class="el" href="group__dp__v3__0.html#ga60da59209c30be099d00f0053a0e809d">XDp_TxSetScrambler()</a>.</p>

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<p>Device instance ID. </p>

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<p>The DisplayPort protocol version that this core instance is configured for. </p>
<p>0 = v1.1a, 1 = v1.2. </p>

<p>Referenced by <a class="el" href="group__dp__v3__0.html#ga424d3b46101c70b80d79047d75227fa8">XDp_RxSetLaneCount()</a>.</p>

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<p>Dual pixel support by this core instance. </p>

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<p>The type of DisplayPort core. </p>
<p>0 = TX, 1 = RX. </p>

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<p>The maximum bits/color supported by this core instance. </p>

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<p>The maximum lane count supported by this core instance. </p>

<p>Referenced by <a class="el" href="group__dp__v3__0.html#ga04b03753ee278bdac3e2262b99366493">XDp_TxEstablishLink()</a>, <a class="el" href="group__dp__v3__0.html#ga831242817739efb8ec76f65b317b00c7">XDp_TxGetRxCapabilities()</a>, and <a class="el" href="group__dp__v3__0.html#ga89c4158905d36c050a2f77cd70ebef11">XDp_TxResetPhy()</a>.</p>

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<p>The maximum link rate supported by this core instance. </p>

<p>Referenced by <a class="el" href="group__dp__v3__0.html#ga831242817739efb8ec76f65b317b00c7">XDp_TxGetRxCapabilities()</a>.</p>

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<p>Multi-stream transport (MST) mode is enabled by this core instance. </p>

<p>Referenced by <a class="el" href="group__dp__v3__0.html#ga4e381b64a7c146f4445dec587af71026">XDp_TxMstCapable()</a>.</p>

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<p>The number of audio channels supported by this core instance. </p>

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<p>The total number of MST streams supported by this core instance. </p>

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<p>The payload data width used by this core instance. </p>

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<p>Quad pixel support by this core instance. </p>

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<p>The clock frequency of the core instance's S_AXI_ACLK port. </p>

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<p>This core instance supports audio packets being sent by the secondary channel. </p>

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<p>YCrCb format support by this core instance. </p>

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<p>YOnly format support by this core instance. </p>

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